IBM P690A Regatta (Power 4 Dual Core Chip)

詳細說明

  System Hardware Configuration
1. Hostname : ivan1~ivan4
2. Model Name : IBM pSeries 690 Turbo 1.9 GHz
3. CPU :

• Number : 32 per node ( Dual Core per Chip )
• Model : Power 4+ Chip (64 Bit)
• Clock Rate : 1.9 GHz
• Archtecture: SMP
• Integer Peak Performance: SPECcint2000 : 1786 ( per CPU)
• Floating Peak Performance: SPECcfp2000 : 1898( per CPU )
• Global Performance: ( Linpack )
  Rmax : 415.2 GFLOPS ( 96 CPUs )
  Rpeak : 729.6 GFLOPS ( 96 CPUs )

4. L1 Cache (per CPU)

• Instruction/Data: 32KB/64KB
• Organization: Direct map, 128-byte line(instruction)
• Two-way, 128-byte line(data)
• Capacity : 128 KB per chip (64KB per processor)

5. L2 Cache (per chip)

• Size : 1.4 MB
• Bandwidth : Shared 124.8 GB/sec
• Organization: Eight-way, 128-byte line

6. L3 Cache ( per MCM)

• Size : Shared 32 MB/chip (128MB/8-way module)
• Bandwidth : Shared 13.9 GB/sec
• Organization: Eight-way , 512-byte line, managed as four 128-byte sectors

7. Internal System Bandwidth: 12.8GB/sec ( x 16 = 205 GB/sec for 32-way )
8. Main Memory:

• Type : Shared Nothing
• Capability : 192 Gbyte ( 64 GB per node )

9. Physical Disks

• Internal: 18 GB x 2

10. Major Directories

• /u1 : 68 GB
• /u2 : 921 GB
• /package1 : 256GB
• /work1: 1088 GB
• /work2: 1024 GB
• /scratch : 34 GB * 3 nodes

11. Peripherals

• Internal: 4mm Tape Drive and DVD-ROM

12. Graphics

• Accelerator: N/A
• Bit-Planes: N/A

13. Job Submission

• Interactive: yes ( 1 hrs limits)
• Batch: LoadLeveler
• LoadLeveler 使用簡介

14. Installation/Upgrade Records

• 2004/11 : install AIX 5.2L , PSSP 3.5

15. Documentions

• AIX 5.2 Online Documentation
• IBM Redbooks

16. More Information

• IBM Co.
   

  NCHC Consulting Window 
 
       Mr. Sheng Chung Lu      (03)5776085 # 205      a00scl00@nchc.org.tw  

  NCHC P690 User Computing Environment  

  LoadLeveler Queuing System:

IBM P690 Regatta Configuration of batch classes
Class	CPU Time Limit(hr.)	Nodes	Spool	CPU-Mode	Max slots for Running
serial	168	1	ivan1	P690 Power4 1.9GHz Turbo	28
4cpu	96	3	ivan1,3,4	P690 Power4 1.9GHz Turbo	80
8cpu	72	3	ivan1,3,4	P690 Power4 1.9GHz Turbo	80
16cpu	72	2	ivan3,4	P690 Power4 1.9GHz Turbo	64
Interactive nodes	1	1	ivan2	P690 Power4 1.9GHz Turbo
mono	若以上計算量仍無法滿足需求，需要特殊申請經計算資源委員會通過，方可使用

  System Software

1. AIX 5.2 64bit version
2. PSSP 3.5
3. LoadLevel 3.2
4. Fortran 77/90 8.1
5. IBM C Language 6.0
6. IBM C++ Language 6.0
7. VisualAge C++ 6.0  

  Application Packages

Most of application package on system are placed in /package1 directory. You may get further information for application packages list at http://www.nchc.org.tw/tw/services/software_database.php

  Disk usage Constrained Policy :

1. /tmp : clear files not accessed over 1 day.
2. /work1 : clear files not accessed over 2 week.
3. /work2 : clear files not accessed over 2 week.
4. /scratch : clear files not accessed over 1 day.( only apply in computing node )

NCHC reverses the right to change/reconfigure/destroy these working filesystem without any backup. 

  IBM Compiler Command

1. C for AIX Compiler Command: 
    "xlc" , “xlc_r” , "cc" , “cc_r”...

2. VisualAge C++ Compiler : (eg: xxx.C) 
    "xlC" ,"xlC_r"

3. XL Fortran for AIX :
    "xlf" , "f77" , "xlf_r" , "xlf90"...

4. MPI for C : 
    "mpcc" , "mpcc_r"

5. MPI for C++ : (eg: xxx.C)
    "mpCC" ,"mpCC_r"

6. MPI for Fortran
   "mpxlf" , "mpxlf90" , "mpxlf90_r"...

example :
Source file : run.C
Execute file : run.exe

mpCC -o run.exe run.C

Detail refer to
http://www.nersc.gov/vendor_docs/ibm/pe/am102mst02.html

A. Compiler Options - Performance:

1. Tyep of RS/6000 System : “–qarch=[architechture]”
    -qarch=pwr2 (IBM power 2 chip) [ivy system]
    -qarch=pwr3 (IBM power 3 chip) [ivory system]
    -qarch=pwr4 (IBM power 4 chip, now the compiler version did not support yet) [imp system]

2. Tuning for specific system : “-qtune=[implementation]”
    -qtune= pwr2 (IBM power 2 chip) [ivy system]
    -qtune= pwr3 (IBM power 3 chip) [ivory system]
    -qtune= pwr4 (IBM power 4 chip, now the compiler version did not support yet) [imp system]

3. Optimization Level ( -O,-O2, -O3, -O4 ) 
    Deault : no optimization
             -O3 is desired setting 
              Use –qstrict ( When –O3 –qhot ) to restrict semantic alteration 
             -O4 implied –O3 –qhot –qipa (only for wall struct)

B. Compiler Options – Data

1. Default Data type are 32-bit

• REAL*4,Complex*8
• Integer*4
• Logical*4

2. 64-bit Floation Poing Repersentation (-qrealsize=bytes)

• -qrealsize=8 for double precision (64-bit)

3. 64-bit mode ( -q64 )

4. Specify the maximum user data area ( -bmaxdata )

• In 32-bit mode, the default maximum user data area is 256MB.
• -bmaxdata:0x10000000 (default)
• -bmaxdata:0x80000000 (get eight 256MB segments, 2GB)

5. Specify the maximum space for the program stack area

• For automatic data area
• -bmaxstack= to overcome soft limit on stack size
• Maximun allowed value is 256MB for 32-bit mode

  More Detail XL Fortran info refer to
       http://www-3.ibm.com/software/ad/fortran/xlfortran/

  More Detail C Language info refer to
       http://www-3.ibm.com/software/ad/vacpp/